One problem encountered in the design of first order sigma-delta ADCs is the presence of certain direct current (DC) offset voltages at the analog input of the ADC. Such DC offset voltages are typically generated by external circuitry or internal amplifiers. The DC offset voltages which are particularly problematic have amplitudes slightly offset from, but not equal to, voltages corresponding to multiples of one-half of the voltage represented by the least significant bit (LSB) of the ADC. When such DC offset voltages are present, the ADC will generate digital signals having recurrent patterns that approximate the value of the DC offset. Thus, the digital output of the ADC will be noisy when the repetition rate of the patterns is within the baseband of the ADC.
A similar noise problem occurs for certain alternating (AC) voltages when the sampling rate of the ADC is high compared to the baseband. In this situation, the low frequency of the AC signals, relative to the sampling rate, results in recurrent patterns in the digital output of the ADC which are similar to those produced by problematic DC offset voltages.
For many application, such as telecommunications, it is important to have low noise at steady state in the absence of an input signal, and a high signal-to-noise ratio when an input signal is present at the ADC. In both situations, it is important to eliminate or reduce the recurrent patterns in the digital output of the ADC. Accordingly, it would be useful to provide an improved ADC which reduces the recurrent patterns in the digital output of ADCs, such as sigma-delta ADCs, caused by certain level DC offsets and certain AC signals.